Power MOSFETs have typically been developed for applications requiring power switching and power amplification. For power switching applications, the commercially available devices are typically double diffused MOSFETs (DMOSFETs). In a typical transistor, much of the breakdown voltage BV is supported by a drift region, which is lowly doped in order to provide a higher breakdown voltage BV. However, the lowly doped drift region also produces high on-resistance Rds-on. For a typical transistor, Rds-on is proportional to BV2.5. Rds-on therefore increases dramatically with increase in breakdown voltage BV for a conventional transistor.
Superjunctions are a well known type of semiconductor device. Superjunction transistors provide a way to achieve low on-resistance (Rds-on), while maintaining a high off-state breakdown voltage (BV). Superjunction devices include alternating P-type and N-type doped columns formed in the drift region. In the OFF-state of the MOSFET, the columns completely deplete at relatively low voltage and thus can sustain a high breakdown voltage (the columns deplete laterally, so that the entire p and n columns are depleted). For a superjunction, the on-resistance Rds-on increases in direct proportion to the breakdown voltage BV, which is a much less dramatic increase than in the conventional semiconductor structure. A superjunction device may therefore have significantly lower Rds-on than a conventional MOSFET device for the same high breakdown voltage (BV) (or conversely may have a significantly higher BV than a conventional MOSFET for a given Rds-on).
Superjunction devices are described, e.g., in “24 mΩcm2 680 V silicon superjunction MOSFET”, Onishi, Y.; Iwamoto, S.; Sato, T.; Nagaoka, T.; Ueno, K.; Fujihira, T., Proceedings of the 14th International Symposium on Power Semiconductor Devices and ICs, 2002, pages: 241-244, the entire contents of which are incorporated herein by reference. FIG. 1 is a cross-sectional view of part of an active cell portion of a conventional superjunction device 100. In this example, the active cell portion of the device 100 includes a vertical FET structure (e.g., an N-channel) formed on a suitably doped (e.g., N+) substrate 102, which acts as a drain region with a drain contact 105. A suitably-doped (e.g., N-Epitaxial (epi) or N-drift) layer 104 is located on top of the substrate 102. In this example, the device 100 also includes a P-body region 106, an N+ source region 108, and an N+ polysilicon gate region 112. The device 100 also includes a gate contact (not shown) and a source metal 114. As seen in FIG. 1A, the superjunction structures may include alternating, charge balanced P-type columns 120 and N-type columns 122. These columns completely deplete horizontally at a low voltage and so are able to withstand a high breakdown voltage in the vertical direction. The N-type columns 122 may comprise of the portions of the N-type epitaxial layer 104 that are situated adjacent to the P-type columns 120.
A termination structure for such devices is commonly made of further P columns which are laid out in a pattern that extends toward the edge or street of the die. For convenience, the P-columns 120 that are part of the active cell portion of the device 100 are referred to herein as active cell P-columns and the P-columns that are formed in the termination region are referred to as termination P-columns.
In a superjunction device, charge needs to be balanced everywhere, including the corner and termination regions. In the central portions of the active region, the P columns can be arranged in uniform parallel rows, where it is simple to arrange the charge balance. However at the edges and corners, it is more difficult to achieve charge balance, which would lower the BV in those regions and make the device less robust. It would be desirable to optimize the design for the active cell corner regions and for the termination regions of the superjunction devices to keep the electric field distribution constant and to keep uniform BV in the termination region. Curved termination design is used in the corner region to improve BV by reducing E-field. Typically, a radius corner of about 150-200 mm is applied. However, matching P column layouts to the corner regions in a charge balanced manner is challenging.
It is within this context that embodiments of the present invention arise.